Highlight Publications:
[ISCA'22][Datacenter GNN, FPGA Prototype]
Shuangchen Li,, D. Niu, Y. Wang, W. Han, Z. Zhang, T. Guan, Y. Guan, H. Liu, L. Huang, Z. Du, F. Xue, Y. Fang, H. Zheng, Y. Xie.
"Hyperscale FPGA-As-A-Service Architecture for Large-Scale Distributed Graph Neural Network",
to appear on the 49rd International Symposium on Computer Architecture, 2022.
[ISSCC'22][NDP for datacenter, testchip]
Dimin Niu, Shuangchen Li, Y. Wang, W. Han, Z. Zhang, Y. Guan, T. Guan, F. Sun, F. Xue, L. Duan, Y. Fang, H. Zheng, X. Jiang, S. Wang, F. Zuo, Y. Wang, B. Yu, Q. Ren, Y. Xie.
"184QPS/W 64Mb/mm2 3D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System",
in Proc. the International Solid-State Circuits Conference, 2022.
[ISCA'16][Pioneer NVM-PIM work, 1000+ citations]
Chi Ping and Shuangchen Li (equal contribution), C. Xu, T. Zhang, J. Zhao, Y. Wang, Y. Liu, Y. Xie.
"PRIME: Processing-in-Memory Architecture for Nueral Network Computation for ReRAM-based Main Memory",
in Proc. the 43rd International Symposium on Computer Architecture, 2016.
[DAC'16][Pioneer NVM-PIM work, testchip on IEDM'17]
Shuangchen Li, C. Xu, Q. Zou, J. Zhao, Y. Lu, Y. Xie.
"PINATUBO: A Processing in Non-volatile Memory Architecture for Bulk Bitwise Operations",
in Proc. the 53nd Annual Design Automation Conference, 2016.